Seongmoo Heo


Hi, I am a graduate student in the Department of Electrical Engineering and Computer Science at the Massachusetts Institute of Technology, and a member of the Computer Science and Artificial Intelligence Laboratory. My main research interest is low-power VLSI computer architecture. I am working for the SCALE project which is investigating advanced architectures for energy-efficient, high-performance computing. I was a teaching assistant 6.823 at 2001 Spring term. I served KGSA (Korean Graduate Students Association) from 2002 Fall term to 2003 Spring term as a vice president.

  My First Baby (ATC1) Picture   (JPEG) , (PDF)

  Pictures
  Switzerland (Zug, Grindelwald, Bern, Luzern, Zurich), 2004 June
  Munich, 2004 June
  Amsterdam, 2004 June

  Resume  (PDF)

  PhD Proposal  (PDF)

  Publications
Seongmoo Heo, and Krste Asanovic, "ATC1 Testchip Report", MOSIS Educational Program Report, April 2005. (PDF)

Seongmoo Heo, and Krste Asanovic, "Replacing Global Wires with an On-Chip Network: A Power Analysis" International Symposium on Low Power Electronics and Design (ISLPED) San Diego, CA, August 2005. (PDF)

Seongmoo Heo, and Krste Asanovic, "Power-Optimal Pipelining in Deep Submicron Technology", International Symposium on Low Power Electronics and Design (ISLPED), Newport Beach, CA, August 2004. (PDF)

Seongmoo Heo, and Krste Asanovic, "Dynamically Resizable Static CMOS Logic for Fine-Grain Leakage Reduction", MIT LCS Technical Report (MIT-LCS-TR-957), July 2004. (PDF)

Seongmoo Heo, Ken Barr, and Krste Asanovic, "Reducing Power Density through Activity Migration", International Symposium on Low Power Electronics and Design (ISLPED), Seoul, Korea, August 2003. (PDF)

Seongmoo Heo and Krste Asanovic, "Leakage-Biased Domino Circuits for Dynamic Fine-Grain Leakage Reduction", Symposium on VLSI Circuits, Honolulu, HI, June 2002. (PDF)

Seongmoo Heo, Ken Barr, Mark Hampton, and Krste Asanovic, "Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines", International Symposium on Computer Architecture (ISCA-29), Anchorage, AK, May 2002. (PDF)

Seongmoo Heo and Krste Asanovic, "Load-Sensitive Flip-Flop Characterization", IEEE Computer Society Annual Symposium on VLSI, Orlando, Florida, April 2001. (PDF)

Seongmoo Heo, Ronny Krashinsky, and Krste Asanovic, "Activity-Sensitive Flip-Flop and Latch Selection for Reduced Energy", 19th Conference on Advanced Research in VLSI, Salt Lake City, Utah, March 2001. (PDF)

Seongmoo Heo, "A Low-power 32-bit Datapath Design", S.M. Thesis, Massachusetts Institute of Technology, August 2000. (PDF)

Ronny Krashinsky, Seongmoo Heo, Michael Zhang, and Krste Asanovic, "SyCHOSys: Compiled Energy-Performance Cycle Simulation", Workshop on Complexity-Effective Design, 27th International Symposium on Computer Architecture, June 2000. (PDF)

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Contacts
office: MIT NE43-616
email: heomoo at mit.edu
msn messenger: heomoo at mit.edu
office phone: +1-617-253-2162